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A VLSI architecture for concurrent data structures by William J. Dally

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Published by Kluwer Academic in Boston .
Written in English

Subjects:

  • Electronic digital computers -- Circuits.,
  • Integrated circuits -- Very large scale integration.,
  • Computer architecture.

Book details:

Edition Notes

Statementby William J. Dally.
SeriesThe Kluwer international series in engineering and computer science ;, SECS 27., VLSI, computer architecture, and digital signal processing, Kluwer international series in engineering and computer science ;, SECS 27., Kluwer international series in engineering and computer science.
Classifications
LC ClassificationsTK7888.4 .D34 1987
The Physical Object
Paginationxvi, 243 p. :
Number of Pages243
ID Numbers
Open LibraryOL2375141M
ISBN 100898382351
LC Control Number87003350

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Digital VLSI Architecture for Real-World Problems The CNAPS Architecture Basic Structure CNAPS is a single instruction, multiple data stream (SIMD) architecture. A SIMD computer has one in-struction sequencing/control unit and many processor nodes (PNs). In CNAPS, thePNs are connected in a one-dimensional array (Figure 1) in which each PN. A message-passing, concurrent architecture is developed that exploits the characteristics of VLSI technology to support concurrent data structures. Interconnection topologies are compared on the Author: Mohammad Reza Meybodi. A 'read' is counted each time someone views a publication summary (such as the title, abstract, and list of authors), clicks on a figure, or views or downloads the full-text. Advanced VLSI architecture designs are required to further reduce power consumption, compress chip area, and speed up operating frequency for high performance integrated circuits. With time-to-market pressure and rising mask costs in the semiconductor industry, engineering change order (ECO) design methodology plays a main role in advanced chip Author: Yu-Cheng Fan, Qiaoyan Yu, Thomas Schumann, Ying-Ren Chien, Chih-Cheng Lu.